Features

• Supports PCIE Gen1(1.0a, 1.1} and Gen2 (Final).

• Supports all standard interfaces, serial, PIPE, 8/10b, and parallel.

• PCIE-compliance and functional coverage grading. (click here for example)

• Built-in PCIE packet/state/protocol monitor.

• Realistic high-performance multi-threaded programming environment. (click here for example)

• Concurrent access verification – a must for PCIE designs

• Powerful high-level simulation control (SDL and DSC) for automatic test case creation.

• Sophisticated test scenario generation at all three layers automatically. (click here for example)

• Powerful error injections with proactive high-level control. (click here for example)

• Automatic exhaustive test of ALL DUT registers and memories, not just PCIE configuration registers.

  (click here to read how registers and memories are tested with different algorithms automatically)