Assertion Model Builder (AMB)

The Best Assertion Tool

The use of AMB as a reference model holder in the verification platform improves the efficiency of verification process. Based on the assumption of the reliable reference model, the transaction checker always accounts for accurate behavior because the AMB makes it possible to directly reuse the architectural model as a golden representation of the design. The assertion of consistency throughout the design chain is very important.

Automatic Transform Any Verilog Variables to C/C++ variables and Functions

ASIC model builder (AMB) addresses the observability issue on verification. The snapshot value of any hardware object entities such as registers, wires, nets, input and output signals can be snooped by AMB in synchronization with a specified event referred to as a triggering event. The AMB provides facilities to monitor and capture the signal value of the design at run time, and to pass it to golden reference model for validation checking.

Key Features

• Plug-and-play paradigm to interface between golden reference model and simulation.

• Efficient manipulation of triggering events associated with each callback function.

• Model granularity independent API supporting any level of reference such as cycle-accurate and transaction-level model.

• Inheritances from meta-chip function to all chip instances.